TY - BOOK
AU - Lu, Bing
AU - Du, Dingzhu
AU - Sapatnekar, Sachin S.
TI - Layout optimization in VLSI design
PB - Kluwer Acad. Publ.
SN - 1402000898
KW - Integrated circuits Very large scale integration Design and construction
KW - Multidisciplinary design optimization
KW - VLSI
KW - Entwurf
PY - 2001
BT - Network theory and applications ; 8
CY - Dordrecht [u.a.]
UR - http://slubdd.de/katalog?TN_libero_mab2
ER -
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