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Angepat, Hari [Author] ; Chiou, Derek [Other]; Chung, Eric S. [Other]; Hoe, James C. [Other]

FPGA-accelerated simulation of computer systems

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San Rafael, California (1537 Fourth Street, San Rafael, CA 94901 USA): Morgan & Claypool, 2014

Published in: Synthesis lectures on computer architecture ; 29
Angepat, Hari [Author]; Chiou, Derek [Author]; Chung, Eric S. [Author]; Hoe, James C. [Author]

FPGA-Accelerated Simulation of Computer Systems - [1st ed. 2014.]

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Cham: Springer International Publishing, 2014. ; Cham: Imprint: Springer, 2014.

Published in: Synthesis Lectures on Computer Architecture
Lavasani, Maysam; Angepat, Hari; Chiou, Derek

An FPGA-based In-Line Accelerator for Memcached

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Institute of Electrical and Electronics Engineers (IEEE), 2014

Published in: IEEE Computer Architecture Letters, 13 (2014) 2, Seite 57-60
Chiou, Derek; Angepat, Hari; Patil, Nikhil; Sunwoo, Dam

Accurate Functional-First Multicore Simulators

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Institute of Electrical and Electronics Engineers (IEEE), 2009

Published in: IEEE Computer Architecture Letters, 8 (2009) 2, Seite 64-67
Caulfield, Adrian; Chung, Eric; Putnam, Andrew; Angepat, Hari; Fowers, Jeremy; Heil, Stephen; Kim, Joo-Young; Lo, Daniel; Papamichael, Michael; Massengill, Todd; Chiou, Derek; Burger, Doug

A Cloud-Scale Acceleration Architecture

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Institute of Electrical and Electronics Engineers (IEEE), 2017

Published in: IEEE Micro (2017), Seite 1-1
Caulfield, Adrian M.; Chung, Eric S.; Putnam, Andrew; Angepat, Hari; Firestone, Daniel; Fowers, Jeremy; Haselman, Michael; Heil, Stephen; Humphrey, Matt; Kaur, Puneet; Kim, Joo-Young; Lo, Daniel; Massengill, Todd; Ovtcharov, Kalin; Papamichael, Michael; Woods, Lisa; Lanka, Sitaram; Chiou, Derek; Burger, Doug

Configurable Clouds

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Institute of Electrical and Electronics Engineers (IEEE), 2017

Published in: IEEE Micro, 37 (2017) 3, Seite 52-61
Chung, Eric; Fowers, Jeremy; Ovtcharov, Kalin; Papamichael, Michael; Caulfield, Adrian; Massengill, Todd; Liu, Ming; Lo, Daniel; Alkalay, Shlomi; Haselman, Michael; Abeydeera, Maleen; Adams, Logan; Angepat, Hari; Boehn, Christian; Chiou, Derek; Firestein, Oren; Forin, Alessandro; Gatlin, Kang Su; Ghandi, Mahdi; Heil, Stephen; Holohan, Kyle; El Husseini, Ahmad; Juhasz, Tamas; Kagi, Kara; [...]

Serving DNNs in Real Time at Datacenter Scale with Project Brainwave

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Institute of Electrical and Electronics Engineers (IEEE), 2018

Published in: IEEE Micro, 38 (2018) 2, Seite 8-20

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FPGA-accelerated simulation of computer systems

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FPGA-Accelerated Simulation of Computer Systems - [1st ed. 2014.]

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An FPGA-based In-Line Accelerator for Memcached

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Bookmarks

Accurate Functional-First Multicore Simulators

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Bookmarks

A Cloud-Scale Acceleration Architecture

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Configurable Clouds

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Bookmarks

Serving DNNs in Real Time at Datacenter Scale with Project Brainwave

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