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  1. Vounckx, Johan [Other]; Azemard, Nadine [Other]; Maurine, Philippe [Other]

    Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation (vol. # 4148) : 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006, Proceedings

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    Berlin, Heidelberg: Springer Berlin Heidelberg, 2006

    Published in: Lecture notes in computer science ; 4148

  2. Vaquie, Bruno; Tiran, Sebastien; Maurine, Philippe

    Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation: A Secure D Flip-Flop against Side Channel Attacks

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    Springer Berlin Heidelberg, 2011

    Published in: Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation (2011), Seite 331-340

  3. Azemard, Nadine; Maurine, Philippe; Vounckx, Johan

    Editorial

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    Elsevier BV, 2008

    Published in: Integration, 41 (2008) 1, Seite 1

  4. Poggi, Davide; Maurine, Philippe; Ordas, Thomas; Sarafianos, Alexandre

    Constructive Side-Channel Analysis and Secure Design: Protecting Secure ICs Against Side-Channel Attacks by Identifying and Quantifying Potential EM and Leakage Hotspots at Simulation Stage

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    Springer International Publishing, 2021

    Published in: Constructive Side-Channel Analysis and Secure Design (2021), Seite 129-147