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  2. Jung, Matthias [Author] ; Technische Universität Kaiserslautern

    System-level modeling, analysis and optimzation of DRAM memories and controller architectures = Modellierung, Analyse und Optimierung von DRAM-Speichern und deren Controller-Architekturen - [Als Manuskript gedruckt]

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    Kaiserslautern: Technische Universität Kaiserslautern, [2017]

    Published in: Forschungsberichte Mikroelektronik ; 26

  9. Keeth, Brent [Author]; Baker, R. Jacob [Author]; Baker, Russel Jacob [Author]

    DRAM circuit design : a tutorial

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    Piscataway, NJ: IEEE Press, 2001

    Published in: IEEE Press series on microelectronic systems

  16. Sell, Bernhard [Author] ; Krautschneider, Wolfgang [Other]; Albrecht, Wolfgang [Other] Technische Universität Hamburg-Harburg Arbeitsbereich Elektrotechnik V, Mikroelektronik

    Interface characterization of metal-gate MOS-structures and the application to DRAM-capacitors - [Elektronische Ressource]

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    2002

  18. Plonka, Rafael [Author]

    Impact of the interface on the paraelectric-to-ferroelectric phase transition in epitaxial BaSrTiO_tn3 thin film capacitors

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    Jülich: Forschungszentrum, Zentralbibliothek, 2007 ; Online-Ausg.:: [Aachen]: [Bibliothek der Techn. Hochsch.], 2007

    Published in: Forschungszentrum Jülich: Berichte des Forschungszentrums Jülich ; 44266