Media type: Book Title: Logic-timing simulation and the degradation delay model Contributor: Bellido, Manuel J. [Author]; Chico, Jorge Juan [Author]; Valencia, Manuel [Author]; Juan, Jorge [Other] Published: London: Imperial College Press, c 2006 Extent: XVII, 267 S.; graph. Darst; 24cm Language: English ISBN: 1860945899; 9781860945892 Origination: RVK notation: ZN 5405 : Rechnergestützter Entwurf und Berechnung elektronischer Schaltungen; Simulation Keywords: MOS-FET > VLSI > Zeitabhängigkeit Footnote: Literaturverz. S. 251 - 263 Provenance information:
Departmental Library DrePunct – open access area Shelf-mark: ZN 5405 B443 Item ID: 31732187 Status: Loanable