Media type: E-Article Title: Integrated Circuit Design: Degradation Delay Model Extension to CMOS Gates Contributor: Juan-Chico, Jorge; Bellido, Manuel J.; Ruiz-de-Clavijo, Paulino; Acosta, Antonio J.; Valencia, Manuel Published in: Integrated Circuit Design Published: Springer Berlin Heidelberg, 2000 Language: Not determined DOI: 10.1007/3-540-45373-3_15 ISSN: 0302-9743 Footnote: