A Heterogeneous and Programmable Compute-In-Memory Accelerator Architecture for Analog-AI Using Dense 2-D Mesh

Media type: E-Article
Title: A Heterogeneous and Programmable Compute-In-Memory Accelerator Architecture for Analog-AI Using Dense 2-D Mesh
Contributor: Jain, Shubham; Tsai, Hsinyu; Chen, Ching-Tzu; Muralidhar, Ramachandran; Boybat, Irem; Frank, Martin M.; Wozniak, Stanislaw; Stanisavljevic, Milos; Adusumilli, Praneet; Narayanan, Pritish; Hosokawa, Kohji; Ishii, Masatoshi; Kumar, Arvind; Narayanan, Vijay; Burr, Geoffrey W.
imprint: Institute of Electrical and Electronics Engineers (IEEE), 2023
Published in: IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Language: Not determined
DOI: 10.1109/tvlsi.2022.3221390
ISSN: 1063-8210; 1557-9999
Keywords: Electrical and Electronic Engineering ; Hardware and Architecture ; Software
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