Architecture of Computing Systems - ARCS 2006: 19th International Conference, Frankfurt/Main, German… - SLUB Dresden

Medientyp: E-Book; Konferenzbericht

Titel: Architecture of Computing Systems - ARCS 2006 : 19th International Conference, Frankfurt/Main, Germany, March 13-16, 2006, Proceedings

Beteiligte: Grass, Werner [Sonstige Person, Familie und Körperschaft]; Sick, Bernhard [Sonstige Person, Familie und Körperschaft]; Waldschmidt, Klaus [Sonstige Person, Familie und Körperschaft]

Erschienen: Berlin, Heidelberg: Springer Berlin Heidelberg, 2006

Umfang: Online-Ressource (XII, 496 p. Also available online, digital)

Sprache: Englisch

DOI: 10.1007/11682127

ISBN: 9783540327660

Identifikator:

RVK-Notation: SS 4800 : Lecture notes in computer science

Schlagwörter: Mobile Computing > Ad-hoc-Netz
Ubiquitous Computing > Kontextbezogenes System
Verteiltes System > Eingebettetes System > Computerarchitektur
Hochleistungsrechnen > Speicher
Supercomputer > Computerarchitektur
Mobile Computing > Ad-hoc-Netz
Ubiquitous Computing > Kontextbezogenes System
Verteiltes System > Eingebettetes System > Computerarchitektur
Hochleistungsrechnen > Speicher
Supercomputer > Computerarchitektur

Entstehung:

Anmerkungen: Lizenzpflichtig

Beschreibung: Invited and Keynote Papers -- Life-Inspired Systems and Their Quality-Driven Design -- The Robustness of Resource Allocations in Parallel and Distributed Computing Systems -- Pervasive Computing -- FingerMouse – A Button Size Visual Hand Tracking and Segmentation Device -- An Ad-Hoc Wireless Network Architecture for Face-to-Face Mobile Collaborative Applications -- Background Data Acquisition and Carrying: The BlueDACS Project -- Prototypical Implementation of Location-Aware Services Based on Super-Distributed RFID Tags -- Combined Resource and Context Model for QoS-Aware Mobile Middleware -- Distributed Modular Toolbox for Multi-modal Context Recognition -- Memory Systems -- Dynamic Dictionary-Based Data Compression for Level-1 Caches -- A Case for Dual-Mapping One-Way Caches -- Cache Write-Back Schemes for Embedded Destructive-Read DRAM -- A Processor Architecture with Effective Memory System for Sort-Last Parallel Rendering -- Architectures -- Controller Synthesis for Mapping Partitioned Programs on Array Architectures -- M2E: A Multiple-Input, Multiple-Output Function Extension for RISC-Based Extensible Processors -- An Operating System Infrastructure for Fault-Tolerant Reconfigurable Networks -- Architectural Tradeoffs in Wearable Systems -- Multiprocessing -- Do Trace Cache, Value Prediction and Prefetching Improve SMT Throughput? -- Scalable and Partitionable Asynchronous Arbiter for Micro-threaded Chip Multiprocessors -- GigaNetIC – A Scalable Embedded On-Chip Multiprocessor Architecture for Network Applications -- Energy Efficient Design -- Efficient System-on-Chip Energy Management with a Segmented Bloom Filter -- Estimating Energy Consumption for an MPSoC Architectural Exploration -- An Energy Consumption Model for an Embedded Java Virtual Machine -- Power Awareness -- PASCOM: Power Model for Supercomputers -- Power-Aware Collective Tree Exploration -- Biologically-Inspired Optimization of Circuit Performance and Leakage: A Comparative Study -- Network Protocols -- A Synchronous Multicast Application for Asymmetric Intra-campus Networks: Definition, Analysis and Evaluation -- A Real-Time MAC Protocol for Wireless Sensor Networks: Virtual TDMA for Sensors (VTS) -- An Effective Video Streaming Method for Video on Demand Services in Vertical Handoff -- Security -- A High-Throughput System Architecture for Deep Packet Filtering in Network Intrusion Prevention -- A Hierarchical Key Management Approach for Secure Multicast -- A Cache Design for a Security Architecture for Microprocessors (SAM) -- Distributed Networks -- Constraint-Based Deployment of Distributed Components in a Dynamic Network -- Comparative Analysis of Ad-Hoc Networks Oriented to Collaborative Activities -- Fault Tolerant Time Synchronization for Wireless Sensor Networks.

Technological progress is one of the driving forces behind the dramatic devel- mentofcomputersystemarchitecturesoverthe pastthreedecades.Eventhough it is quite clear that this development cannot only be measured by the ma- mum number of components on a chip, Moore’s Law may be and is often taken as a simple measure for the non-braked growth of computational power over the years. The more components are realizable on a chip, the more innovative and unconventional ideas can be realized by system architects. As a result, research in computer system architectures is more exciting than ever before. This book coversthe trends that shape the ?eld of computer system archit- tures.Thefundamenataltrade-o?inthedesignofcomputing systemsis between ?exibility, performance,powerconsumption, andchip area.The full exploitation of future silicon capacity requires new architecture approaches and new design paradigms such as multiple computers on a single chip, recon?gurable processor arrays, extensible processor architectures, and embedded memory technologies. For a successful use in practical applications, it is not enough to solve the ha- wareproblemsbutalsotodevelopplatformsthatprovidesoftwareinfrastructure and support e?ective programming. A quantum jump in complexity is achieved by embedded computing systems with an unprecedented level of connectivity linking together a growing n- ber of physical devices through networks. Embedded systems will become more and more pervasive as the component technologies become smaller, faster, and cheaper. Their complexity arises not only from the large number of components but also from a lack of determinism and a continual evolution of these systems.

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