A simulation-based methodology for evaluating the DPA-Resistance of cryptographic functional units with application to CMOS and MCML technologies

Media type: E-Article
Title: A simulation-based methodology for evaluating the DPA-Resistance of cryptographic functional units with application to CMOS and MCML technologies
Contributor: Regazzoni, Francesco [Author]; Badel, Stéphane [Author]; Eisenbarth, Thomas [Author]; Großschädl, Johann [Author]; Poschmann, Axel York [Author]; Toprak, Zeynep [Author]; Macchetti, Marco [Author]; Pozzi, Laura [Author]; Paar, Christof [Author]; Leblebici, Yusuf [Author]; Ienne, Paolo [Author]; Blume, Holger [Author]
Published: 2007-01-01
Published in: International conference on embedded computer systems : architectures, modeling, and simulation: Samos, Greece, 16 - 19 July 2007
Language: English
ISBN: 1424410584
Keywords: CMOS logic circuit ; Power consumption ; Cryptographic hardware ; Side channel attack ; Nonlinear bijective function ; Simulation-based methodology ; Substitution box S7 ; SPICE ; Cryptographic functional unit ; Kasumi algorithm ; MCML ; Circuit ; DPA-resistance evaluation ; Circuit simulation ; Differential power analysis ; Cryptography ; CMOS ; Logic
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