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Mandry, Holger [Author]; Herkle, Andreas [Author]; Kürzinger, Ludwig [Author]; Müelich, Sven [Author]; Becker, Joachim [Author]; Fischer, Robert [Author]; Ortmanns, Maurits [Author]

Modular PUF coding chain with high-speed Reed-Muller decoder

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  • Media type: Electronic Resource
  • Title: Modular PUF coding chain with high-speed Reed-Muller decoder
  • Contributor: Mandry, Holger [Author]; Herkle, Andreas [Author]; Kürzinger, Ludwig [Author]; Müelich, Sven [Author]; Becker, Joachim [Author]; Fischer, Robert [Author]; Ortmanns, Maurits [Author]
  • imprint: Universität Ulm, 2019-08-28T10:20:09Z
  • Language: English
  • DOI: https://doi.org/10.18725/OPARU-18293
  • ISBN: 1678631175
  • Keywords: Reed-Muller ; PUF ; Generalized concatenated codes ; Field programmable gate array ; DDC 620 / Engineering & allied operations ; Electronic ; Field programmable gate arrays ; Integrierte Schaltung ; RM-Code ; Physical unclonable function ; Integrated circuits ; DDC 004 / Data processing & computer science ; Transistors ; Congresses ; Konkatenationscode ; Computer engineering
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  • Description: Physical Unclonable Functions (PUFs) offer the possibility to produce unique fingerprints for integrated circuits. As raw PUF responses are affected by noise, some post-processing steps are necessary. We present a coding chain test framework for PUFs on Field Programmable Gate Arrays. The framework allows easy exchange, evaluation and comparison of different PUF implementations, coding algorithms and other chain modules. For a testing framework, the execution time of the evaluated algorithm is a bottleneck, since a huge amount of runs are supposed to be done. Hence, we additionally present a new type of Reed-Muller decoder hardware architecture using parallel modules to speed up the decoding process. The decoding time could be decreased by 95% in comparison to existing implementations at the cost of 41 times higher slice count. ; acceptedVersion