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Media type:
E-Article
Title:
An Efficient Hardware-Based Fault-Tolerant Method for SMS4
Contributor:
Luo, Hanguang;
Wen, Guangjun;
Su, Jian
imprint:
EDP Sciences, 2018
Published in:MATEC Web of Conferences
Language:
Not determined
DOI:
10.1051/matecconf/201820802005
ISSN:
2261-236X
Origination:
Footnote:
Description:
<jats:p>The SMS4 cryptosystem has been used in the Wireless LAN Authentication and Privacy Infrastructure (WAPI) standard for providing data confidentiality in China. So far, reliability has not been considered a primary objective in original version. However, a single fault in the encryption/decryption process can completely change the result of the cryptosystem no matter the natural or malicious injected faults. In this paper, we proposed low-cost structure-independent fault detection scheme for SMS4 cryptosystem which is capable of performing online error detection and can detect a single bit fault or odd multiple bit faults in coverage of 100 percent. Finally, the proposed techniques have been validated on Virtex-7 families FPGA platform to analyze its power consumption, overhead and time delay. It only needs 85 occupied Slices and 8.72mW to run a fault-tolerant scheme of SMS4 cryptosystem with 0.735ns of detection delay. Our new scheme increases in minimum redundancy to enhance cryptosystem’s reliability and achieve a better performance compared with the previous scheme.</jats:p>