Media type: E-Article Title: A 1.5-V 3.2 Gb/s/pin Graphic DDR4 SDRAM With Dual-Clock System, Four-Phase Input Strobing, and Low-Jitter Fully Analog DLL Contributor: Lee, Ki-Won; Cho, Joo-Hwan; Choi, Byoung-Jin; Lee, Geun-Il; Jung, Ho-Don; Lee, Woo-Young; Park, Ki-Chon; Joo, Yong-Suk; Cha, Jae-Hoon; Choi, Young-Jung; Moran, Patrick B.; Ahn, Jin-Hong imprint: Institute of Electrical and Electronics Engineers (IEEE), 2007 Published in: IEEE Journal of Solid-State Circuits Language: Not determined DOI: 10.1109/jssc.2007.906191 ISSN: 0018-9200 Keywords: Electrical and Electronic Engineering Origination: Footnote: