Media type: E-Article Title: DSP-Based Parallel Implementation of Speeded-Up Robust Features Contributor: LIAO, Chao; WANG, Guijin; MIAO, Quan; WANG, Zhiguo; SHI, Chenbo; LIN, Xinggang Published: Institute of Electronics, Information and Communications Engineers (IEICE), 2011 Published in: IEICE Transactions on Information and Systems, E94-D (2011) 4, Seite 930-933 Language: English DOI: 10.1587/transinf.e94.d.930 ISSN: 0916-8532; 1745-1361 Keywords: Artificial Intelligence ; Electrical and Electronic Engineering ; Computer Vision and Pattern Recognition ; Hardware and Architecture ; Software Origination: Footnote: Access State: Open Access