Single Photon Avalanche Diode (SPAD) implementation in 28nm FD-SOI CMOS Technology ; Implémentation de diode à avalanche à photon unique (SPAD) dans une technologie CMOS FD-SOI 28nm
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Medientyp:
E-Book
Titel:
Single Photon Avalanche Diode (SPAD) implementation in 28nm FD-SOI CMOS Technology ; Implémentation de diode à avalanche à photon unique (SPAD) dans une technologie CMOS FD-SOI 28nm
Erschienen:
[Erscheinungsort nicht ermittelbar]: HAL CCSD, 2021
Sprache:
Französisch
Entstehung:
Hochschulschrift:
Dissertation, HAL CCSD, 2021
Anmerkungen:
Beschreibung:
The objectives of this thesis concern the simulation, the design and the characterization of new single-photon avalanche diode (SPAD) structures implemented in 28nm FD-SOI (Fully Depleted Silicon on Insulator) CMOS technology from STMicroelectronics. SPAD photodetectors have a high detection sensitivity (combined with a very short response time) which makes them excellent candidates for Time of Flight (ToF) measurements in telemetry, facial recognition and LIDAR applications (Light Detection and Ranging) for autonomous cars. The integration of the SPAD into the FD-SOI CMOS technology allows to create an intrinsically 3D pixel, i) by implementing the SPAD at the PW (P-Well) / DNW (Deep N-Well) junction into the silicon bulk under the buried oxide (BOX), and ii) by using the silicon film located above the BOX to integrate the associated electronics (quenching and addressing circuits), while optimizing the filling factor with a back-side illumination (BSI) approach. The SPAD realized in the native technology (with respect of all design rules) have highlighted several weak points: a high DCR (Dark Count Rate) for low excess voltages (500Hz/µm2 at Vex = 0.5V for a breakdown voltage of 9.5V) and a predominant breakdown on the edges of the active zone. In this context, the work presented in this thesis has focused on the optimization of the electrical performances of the FD-SOI SPAD by modifications of the structure: adjustments of DNW implantation conditions, modifications of STI (Shallow Trench Isolation) etc. The optimized SPAD FD-SOI structures have experimentally demonstrated a much lower level of DCR (17Hz/µm2 at Vex = 1V for a breakdown voltage of 15.8V). Preliminary electro-optical characterizations were carried out with a photon detection probability of 7% at Vex = 1V and a wavelength of 650nm. Even if this work did not achieve the performance of the state of the art, it explored many paths for optimization, some leading to a significant improvement in the performance of SPAD in this technology. The ...