Anmerkungen:
Nach Informationen von SSRN wurde die ursprüngliche Fassung des Dokuments February 16, 2023 erstellt
Beschreibung:
To promote the nanoscale VLSI designs in the current electronic industry, ample of research is done in the course of low-power designs. Usually, the power consumption is relatively high in nanoscale designs, since the source and drain regions are so near in the nanoscale devices. When the channel between the source and drain is so small, the control over the channel is so weak, which incurs more leakages in the device. FinFET device is one of the best choices for the current electronic circuits. This paper is so focused on the FinFET technology-based data path implementation for low-power and high-speed devices. Data path plays the role of logical and arithmetic operations to be performed in the system. Which includes, NOT, AND, OR, and other logical operations. A 4-bit carry-look-ahead adder performs arithmetic operations such as bitwise addition, subtraction, increment, and decrement. The designs are implemented with the LT-Spice simulator. The power consumption of 7W with propagation delay was reduced by 1.2ms in the proposed design compared with CMOS technology. The results conclude that the FinFET-based data paths would perform better than the bulk CMOS technology