Dreweke, Alexander
[Verfasser:in];
Wörlein, Marc
[Verfasser:in];
Fischer, Ingrid
[Verfasser:in];
Schell, Dominic
[Verfasser:in];
Philippsen, Michael
[Verfasser:in];
Meinl, Thorsten
[Verfasser:in]
Beteiligte:
Dreweke, Alexander
[Verfasser:in];
Wörlein, Marc
[Verfasser:in];
Fischer, Ingrid
[Verfasser:in];
Schell, Dominic
[Verfasser:in];
Philippsen, Michael
[Verfasser:in];
Meinl, Thorsten
[Verfasser:in]
Erschienen:
KOPS - The Institutional Repository of the University of Konstanz, 2007
Sprache:
Englisch
DOI:
https://doi.org/10.1109/CGO.2007.14
Entstehung:
Anmerkungen:
Diese Datenquelle enthält auch Bestandsnachweise, die nicht zu einem Volltext führen.
Beschreibung:
Procedural abstraction (PA) extracts duplicate code segments into a newly created method and hence reduces code size. For embedded micro computers the amount of memory is still limited so code reduction is an important issue. This paper presents a novel approach to PA, that is especially targeted towards embedded systems. Earlier approaches of PA are blind with respect to code reordering, i.e., two code segments with the same semantic effect but with different instruction orders were not detected as candidates for PA. Instead of instruction sequences, in our approach the data flow graphs of basic blocks are considered. Compared to known PA techniques more than twice the number of instructions can be saved on a set of binaries, by detecting frequently appearing graph fragments with a graph mining tool based on the well known gSpan algorithm. The detection and extraction of graph fragments is not as straight forward as extracting sequential code fragments. NP-complete graph operations and special rules to decide which parts can be abstracted are needed. However, this effort pays off as smaller sizes significantly reduce costs on mass-produced embedded systems. ; published