• Medientyp: E-Artikel
  • Titel: High Launch Switching Activity Reduction in At-Speed Scan Testing Using CTX: A Clock-Gating-Based Test Relaxation and X-Filling Scheme
  • Beteiligte: MIYASE, Kohei; WEN, Xiaoqing; FURUKAWA, Hiroshi; YAMATO, Yuta; KAJIHARA, Seiji; GIRARD, Patrick; WANG, Laung-Terng; TEHRANIPOOR, Mohammad
  • Erschienen: Institute of Electronics, Information and Communications Engineers (IEICE), 2010
  • Erschienen in: IEICE Transactions on Information and Systems
  • Sprache: Englisch
  • DOI: 10.1587/transinf.e93.d.2
  • ISSN: 0916-8532; 1745-1361
  • Schlagwörter: Artificial Intelligence ; Electrical and Electronic Engineering ; Computer Vision and Pattern Recognition ; Hardware and Architecture ; Software
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  • Zugangsstatus: Freier Zugang