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  1. Cassano, Luca [Editor] ; IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems 36. 2023 Juan-Les-Pins, Institute of Electrical and Electronics Engineers

    36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems : Juan-Les-Pins, France, October 3rd-5th, 2023

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    [Piscataway, NJ]: IEEE, 2023

  2. Cassano, Luca [Editor]; Chakravarty, Sreejit [Editor]; Bosio, Alberto [Editor] ; IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems 35. 2022 Austin, Tex, Institute of Electrical and Electronics Engineers

    35th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) : Austin, Texas (USA), October 19th-21st, 2022

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    Piscataway, NJ: IEEE, 2022

  3. Dilillo, Luigi [Editor]; Cassano, Luca [Editor]; Papadimitriou, Athanasios [Editor] ; IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems 34. 2021 Online, Institute of Electrical and Electronics Engineers

    34th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems : Athens, Greece (on-line virtual event), October 6-8, 2021

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    Piscataway, NJ: IEEE, 2021

  4. Dilillo, Luigi [Editor]; Psarakis, Mihalis [Editor]; Siddiqua, Taniya [Editor] ; IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems 33. 2020 Online, Institute of Electrical and Electronics Engineers

    33rd IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems : ESA-ESRIN, Italy (on-line virtual event), October 19-21, 2020

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    Piscataway, NJ: IEEE, 2020

  5. IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems 32. 2019 Noordwijk; Delft, Institute of Electrical and Electronics Engineers

    2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)

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    [Piscataway, NJ]: IEEE, 2019

  6. IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems 31. 2018 Chicago, Ill, Institute of Electrical and Electronics Engineers

    2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) : 8-10 Oct. 2018

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    [Piscataway, NJ]: IEEE, 2018

  7. Chapman, Glenn [Other] ; Institute of Electrical and Electronics Engineers, IEEE Computer Society Test Technology Technical Council, IEEE Computer Society Technical Committee on Fault Tolerant Computing

    IEEE 25th [i.e. 23rd] International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT), 2010 : 6 - 8 Oct. 2010, Kyoto, Japan

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    Piscataway, NJ: IEEE, 2010

  8. Institute of Electrical and Electronics Engineers, IEEE Computer Society, IEEE Computer Society Technical Committee on Fault Tolerant Computing, IEEE Computer Society Test Technology Technical Council

    IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2012 : 3 - 5 Oct. 2012, Austin, Texas, U.S.A.

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    Piscataway, NJ: IEEE, 2012

  9. IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems 30. 2017 Cambridge, Institute of Electrical and Electronics Engineers, IEEE Computer Society, IEEE Computer Society Test Technology Technical Council, IEEE Computer Society Technical Committee on Fault Tolerant Computing

    2017 IEEE Int. Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) : October 23-25, 2017, Cambridge, UK

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    Piscataway, NJ: IEEE, 2017

  10. IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems 29. 2016 Storrs, Conn, Institute of Electrical and Electronics Engineers, IEEE Computer Society, IEEE Computer Society Test Technology Technical Council, IEEE Computer Society Technical Committee on Dependable Computing and Fault Tolerance

    2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) : September 19-20, 2016, University of Connecticut, Storrs, CT USA

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    Piscataway, NJ: IEEE, 2016

  11. International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems 28. 2015 Amherst, Mass, Institute of Electrical and Electronics Engineers, IEEE Computer Society

    Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) : 12-14 October 2015, University of Massachusetts Amherst, USA

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    Piscataway, NJ: IEEE, 2015

  12. Institute of Electrical and Electronics Engineers, IEEE Computer Society, IEEE Computer Society Test Technology Technical Council

    2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) : 1 - 3 Oct. 2014, Amsterdam

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    Piscataway, NJ: IEEE, 2014