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Schoeberl, Martin [Author]; Schleuniger, Pascal [Author]; Puffitsch, Wolfgang [Author]; Brandner, Florian [Author]; Probst, Christian W. [Author] ; Martin Schoeberl and Pascal Schleuniger and Wolfgang Puffitsch and Florian Brandner and Christian W. Probst [Contributor]

Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach

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  • Media type: Text; E-Article; Electronic Conference Proceeding
  • Title: Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach
  • Contributor: Schoeberl, Martin [Author]; Schleuniger, Pascal [Author]; Puffitsch, Wolfgang [Author]; Brandner, Florian [Author]; Probst, Christian W. [Author]
  • Published: Schloss Dagstuhl – Leibniz-Zentrum für Informatik, 2011
  • Language: English
  • DOI: https://doi.org/10.4230/OASIcs.PPES.2011.11
  • Keywords: WCET analysis ; WCET-aware compilation ; Time-predictable architecture
  • Origination:
  • Footnote: Diese Datenquelle enthält auch Bestandsnachweise, die nicht zu einem Volltext führen.
  • Description: Current processors are optimized for average case performance, often leading to a high worst-case execution time (WCET). Many architectural features that increase the average case performance are hard to be modeled for the WCET analysis. In this paper we present Patmos, a processor optimized for low WCET bounds rather than high average case performance. Patmos is a dual-issue, statically scheduled RISC processor. The instruction cache is organized as a method cache and the data cache is organized as a split cache in order to simplify the cache WCET analysis. To fill the dual-issue pipeline with enough useful instructions, Patmos relies on a customized compiler. The compiler also plays a central role in optimizing the application for the WCET instead of average case performance.
  • Access State: Open Access