Schüffny, Franz Marcus
[Author];
Höppner, Sebastian
[Author];
Hänzsche, Stefan
[Author];
George, Richard Miru
[Author];
Zeinolabedin, Seyed Mohammad Ali
[Author];
Mayr, Christian
[Author]
;
Technische Universität Dresden
Power Minimization in Neural Recording ΔΣ Modulators by Adaptive Back-Gate Voltage Tuning
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Media type:
E-Article
Title:
Power Minimization in Neural Recording ΔΣ Modulators by Adaptive Back-Gate Voltage Tuning
Contributor:
Schüffny, Franz Marcus
[Author];
Höppner, Sebastian
[Author];
Hänzsche, Stefan
[Author];
George, Richard Miru
[Author];
Zeinolabedin, Seyed Mohammad Ali
[Author];
Mayr, Christian
[Author]
Published:
NY: IEEE - Institute of Electrical and Electronics Engineers, New York, [2024]
Description:
This letter presents a scalable technique to reduce the power of the analog input stage in neural recording front-ends in Globalfoundries 22 -nm FDSOI. The back-gate voltages are adapted to reduce the threshold voltage and thus allow supply voltage reduction. This adaption increases PVT stability of subthreshold circuits. A comparison to a conventional delta–sigma ADC is drawn and the minimum power point is measured, resulting in 0.7 - μW /channel at 7.2 - μV input-referred noise. Additionally, the transition to smaller technologies promises low-power consumption in the digital domain, by allowing smaller supply voltage and higher integration density.