• Medientyp: E-Artikel
  • Titel: Power Minimization in Neural Recording ΔΣ Modulators by Adaptive Back-Gate Voltage Tuning
  • Beteiligte: Schüffny, Franz Marcus [Verfasser:in]; Höppner, Sebastian [Verfasser:in]; Hänzsche, Stefan [Verfasser:in]; George, Richard Miru [Verfasser:in]; Zeinolabedin, Seyed Mohammad Ali [Verfasser:in]; Mayr, Christian [Verfasser:in]
  • Erschienen: NY: IEEE - Institute of Electrical and Electronics Engineers, New York, [2024]
  • Erschienen in: IEEE solid-state circuits letters
  • Sprache: Englisch
  • DOI: 10.1109/LSSC.2023.3270243
  • Schlagwörter: 1/f-noise ; recording ; low-noise amplifiers ; Aufzeichnung ; rauscharme Verstärker ; Back-Gate-Anpassung ; Operationsverstärker ; 1/f-Rauschen ; operational amplifiers ; back-gate adaptation
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  • Beschreibung: This letter presents a scalable technique to reduce the power of the analog input stage in neural recording front-ends in Globalfoundries 22 -nm FDSOI. The back-gate voltages are adapted to reduce the threshold voltage and thus allow supply voltage reduction. This adaption increases PVT stability of subthreshold circuits. A comparison to a conventional delta–sigma ADC is drawn and the minimum power point is measured, resulting in 0.7 - μW /channel at 7.2 - μV input-referred noise. Additionally, the transition to smaller technologies promises low-power consumption in the digital domain, by allowing smaller supply voltage and higher integration density.
  • Zugangsstatus: Freier Zugang
  • Rechte-/Nutzungshinweise: Urheberrechtsschutz